Execution and memory
ESP32-S3 boot, flash, QIO, octal PSRAM, timers, reset, NVS, and bounded debug.
Browser-operated hardware workbench
Upload a real merged ESP32-S3 image, boot it inside an isolated native worker, and inspect the display, keyboard, buttons, serial output, sensors, power state, memory, and CPU before you flash a device.
Explicit fidelity
Deterministic development surfaces are modeled and tested with owned conformance firmware. Physical claims stay with physical hardware.
ESP32-S3 boot, flash, QIO, octal PSRAM, timers, reset, NVS, and bounded debug.
ST7789 framebuffers, Cardputer keyboard IRQs, StickS3 buttons, and UART.
Deterministic BMI270 samples and logical M5PM1 battery, VIN, and charging state.
RF, current draw, thermals, acoustic output, noise, calibration, and final flashing.
Hostile-input boundary
Each worker receives no host route, no capabilities, read-only runtime inputs, and one writable session directory. Uploads, flash state, sockets, and screenshots are destroyed when the session ends.
Inspect the public security contract →